ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 49
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ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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11.2.3
11.2.4
8285D–AVR–06/11
Brown-out Detection
Watchdog Reset
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P has an On-chip
Brown-out Detection (BOD) circuit for monitoring the V
to a fixed trigger level. The trigger level for the BOD can be selected by the BODLEVEL Fuses.
The trigger level has a hysteresis to ensure spike free Brown-out Detection. The hysteresis on
the detection level should be interpreted as V
V
in
trigger level (V
t
The BOD circuit will only detect a drop in V
ger than t
Figure 11-5. Brown-out Reset During Operation
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t
page 50
Figure 11-6. Watchdog Reset During Operation
TOUT
HYST
Figure
has expired.
/2.When the BOD is enabled, and V
for details on operation of the Watchdog Timer.
BOD
11-5), the Brown-out Reset is immediately activated. When V
CC
given in
BOT+
INTERNAL
TIME-OUT
RESET
RESET
in
V
CC
”System and Reset Characteristics” on page
Figure
11-5), the delay counter starts the MCU after the Time-out period
V
CK
BOT-
CC
CC
decreases to a value below the trigger level (V
if the voltage stays below the trigger level for lon-
BOT+
CC
= V
level during operation by comparing it
BOT
V
t
TOUT
BOT+
+ V
326.
HYST
CC
/2 and V
increases above the
BOT-
TOUT
. Refer to
= V
BOT
BOT-
49
-
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