M42800A Atmel Corporation, M42800A Datasheet - Page 179

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M42800A

Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M42800A

Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
19. SPI: Serial Peripheral Interface
19.1
1779D–ATARM–14-Apr-06
Pin Description
The AT91M42800A includes two SPIs which provide communication with external devices in
master or slave mode. They are independent, and are referred to by the letters A and B.
Seven pins are associated with the SPI Interface. When not needed for the SPI function, each
of these pins can be configured as a PIO. Support for an external master is provided by the
PIO Controller Multi-driver option. To configure an SPI pin as open-drain to support external
drivers, set the corresponding bits in the PIO_MDSR register (see
An input filter can be enabled on the SPI input pins by setting the corresponding bits in the
PIO_IFSR (see
put or slave select input. Refer to
Figure 19-1. SPI Block Diagram
APB
MCK
MCK/32
page
108). The NPCS0/NSS pin can function as a peripheral chip select out-
Serial Peripheral Interface
Interrupt Controller
Table 19-1 on page 180
Advanced
INT
NPCS0/NSS
NPCS1
NPCS2
NPCS3
SPCK
MISO
MOSI
for a description of the SPI pins.
Parallel IO
Controller
AT91M42800A
page
114).
Generic Name
NPCS0/NSS
NPCS1
NPCS2
NPCS3
SPCK
MOSI
MISO
179

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