M42800A Atmel Corporation, M42800A Datasheet - Page 214

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

24.6
24.7
24.8
24.9
214
SCK is Ignored at 32 kHz
SCK Maximum Frequency Relative to MCK in Synchronous Mode
PIO Input Filters are not Bit-to-bit Selectable
PIO Multi-drive Capability not Usable
AT91M42800A
The user must use the Time Guard programmed at the value 12.
If the origin of the Master Clock is the Slow Clock, the USART Channels cannot be synchro-
nized with a clock that comes from the SCK pin.
No problem fix/workaround to propose.
In USART Synchronous Mode, the external clock frequency (SCK) must be at least 10 times
lower than the Master Clock.
No problem fix/workaround to propose.
The PIO input filters are enabled and disabled only for all of the PIO input pins and not individ-
ually. To activate them, the user must write 0x0001 in the PIO IFER and 0x0001 in the PIO
IFDR to deactivate them.
No problem fix/workaround to propose.
The PIO multi-drive capability does not work in PIO mode or in peripheral mode.
No practical workaround proposed.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
1779D–ATARM–14-Apr-06