SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 110

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

17.3.6
17.3.6.1
110
AT91SAM7L128/64 Preliminary
Power Supply Control
Controlling the Backup Power Supply
Until vr_ok is deactivated, the vddcore_nreset signal remains active.
The backup power supply can be controlled by the main power switch. This main power switch
can only be enabled by tying the FWUP pin to GND. As soon as the power has risen, the Supply
Controller maintains the main power switch closed by asserting the signal, supply_on.
The main power switch can be opened by the software by writing the Supply Controller Control
Register SUPC_CR with the shutdown bit, SHDW set at 1.
Writing SUPC_CR with SHDW set at 1 results in the following actions:
The shutdown sequence led by writing SHDW is described in
It is also possible to wait the current frame of the LCD Controller before shutting down the LCD
Controller power supply. This can be done by writing the SHDWEOF bit to 1, instead of the
SHDW bit.
If SHDWEOF is set, the sequence is exactly the same, except the end_of_frame signal shall be
asserted for at least one slow clock cycle before the lcd_nreset signal is asserted and the charge
pump is disabled.
The shutdown sequence led by writing SHDWEOF is described in
• asserts the vddcore_nreset signal then switches off the voltage regulator
• if the LCD charge pump is enabled, asserts the lcd_nreset signal then disables the LCD
• asserts the Flash Memory reset signal and disables the Flash Memory power supply
• disables the SRAM power supply
• asserts the Clock reset signal, rt_nreset, then disables the Clock power supply
• releases the supply_on signal, thus switching off the backup power supply and enters Off
charge pump
Mode.
Figure 17-6 on page
Figure 17-7 on page
6257A–ATARM–20-Feb-08
111.
112.