SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 476
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SAM7L128
Manufacturer Part Number
SAM7L128
Description
Manufacturer
Atmel Corporation
Specifications of SAM7L128
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
36 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
80
Ext Interrupts
80
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
3
Segment Lcd
40
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
460
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
6
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.8 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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33.5.4
Figure 33-2. EOCx and DRDY Flag Behavior
476
(ADC_CHSR)
(ADC_SR)
(ADC_SR)
EOCx
DRDY
CHx
AT91SAM7L128/64 Preliminary
Conversion Results
Write the ADC_CR
with START = 1
When a conversion is completed, the resulting 10-bit digital value is stored in the Channel Data
Register (ADC_CDR) of the current channel and in the ADC Last Converted Data Register
(ADC_LCDR).
The channel EOC bit in the Status Register (ADC_SR) is set and the DRDY is set. In the case of
a connected PDC channel, DRDY rising triggers a data transfer request. In any case, either
EOC and DRDY can trigger an interrupt.
Reading one of the ADC_CDR registers clears the corresponding EOC bit. Reading ADC_LCDR
clears the DRDY bit and the EOC bit corresponding to the last converted channel.
If the ADC_CDR is not read before further incoming data is converted, the corresponding Over-
run Error (OVRE) flag is set in the Status Register (ADC_SR).
In the same way, new data converted when DRDY is high sets the bit GOVRE (General Overrun
Error) in ADC_SR.
The OVRE and GOVRE flags are automatically cleared when ADC_SR is read.
Conversion Time
Read the ADC_CDRx
Write the ADC_CR
with START = 1
Conversion Time
Read the ADC_LCDR
6257A–ATARM–20-Feb-08
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