SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 160

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SAM7L128

Manufacturer Part Number
SAM7L128
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7L128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
36 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
80
Ext Interrupts
80
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
3
Segment Lcd
40
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
460
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
6
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.8 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
20.2.3
20.2.4
20.2.4.1
160
AT91SAM7L128/64 Preliminary
Entering Programming Mode
Programmer Handshaking
Write Handshaking
Table 20-3.
The following algorithm puts the device in Parallel Programming Mode:
A handshake is defined for read and write operations. When the device is ready to start a new
operation (RDY signal set), the programmer starts the handshake by clearing the NCMD signal.
The handshaking is achieved once NCMD signal is high and RDY is high.
For details on the write handshaking sequence, refer to
Figure 20-3. Parallel Programming Timing, Write Sequence
DATA[15:0]
0x0044
0x0025
0x0054
0x0035
0x001F
0x001E
• Apply GND, TST, CLKIN, FWUP and the supplies as described in table 4.1.
• Apply XIN clock
• Wait for 20 ms
• Start a read or write handshaking.
MODE[3:0]
DATA[15:0]
NVALID
Command Bit Coding (Continued)
NCMD
NOE
RDY
1
Symbol
CGPB
GGPB
SSE
GSE
WRAM
GVE
2
3
Command Executed
Clear General Purpose NVM bit
Get General Purpose NVM bit
Set Security Bit
Get Security Bit
Write Memory
Get Version
Figure 20-3
4
5
and
Table
6257A–ATARM–20-Feb-08
20-4.

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