SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 512

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

34.7.5
Name:
Access:
Reset Value: 0x00000000
• DISPMODE: Display Mode Register
(Taken into account from the next begin of frame.)
• LCDBLKFREQ: LCD Blinking Frequency Selection
(Taken into account from the next begin of frame.)
Blinking frequency = Frame Frequency/LCDBLKFREQ[7:0].
Note:
512
DISPMODE2
31
23
15
–
–
7
–
0 written in LCDBLKFREQ stops blinking.
AT91SAM7L128/64 Preliminary
0
0
0
0
1
1
1
1
SLCDC Display Register
SLCDC_DR
Read-write
30
22
14
–
–
6
–
DISPMODE1
0
0
1
1
0
0
1
1
29
21
13
–
–
5
–
DISPMODE0
28
20
12
–
–
4
–
LCDBLKFREQ
0
1
0
1
0
1
0
1
27
19
11
–
–
3
–
Display Mode
Normal Mode:
Latched data are displayed.
Force Off Mode:
All pixels are invisible. (The SLCDC memory is
unchanged.)
Force On Mode
All pixels are visible. (The SLCDC memory is unchanged.)
Blinking Mode:
All pixels are alternately turned off to the predefined state
in SLCDC memory at LCDBLKFREQ frequency. (The
SLCDC memory is unchanged.)
Inverted Mode:
All pixels are set in the inverted state as defined in SLCDC
memory. (The SLCDC memory is unchanged.)
Inverted Blinking Mode:
All pixels are alternately turned off to the predefined
opposite state in SLCDC memory at LCDBLKFREQ
frequency. (The SLCDC memory is unchanged.)
User Buffer Only Load Mode:
Blocks the automatic transfer from User Buffer to Display
Buffer.
Buffer Swap Mode:
All pixels are alternatively assigned to the state defined in
the User Buffer, then to the state defined in the Display
Buffer at LCDBLKFREQ frequency.
26
18
10
–
–
2
DISPMODE
25
17
–
–
9
1
6257A–ATARM–20-Feb-08
24
16
–
–
8
0