SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 761
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SAM9G10
Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(1274 pages)
2.SAM9261.pdf
(43 pages)
3.SAM9G10.pdf
(750 pages)
4.SAM9G10.pdf
(39 pages)
Specifications of SAM9G10
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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38.7.2
38.8
38.8.1
38.8.2
38.8.3
38.8.4
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Master Mode
Modes of Operation
Definition
Application Block Diagram
Programming Master Mode
Master Transmitter Mode
The TWI has six modes of operations:
These modes are described in the following chapters.
The Master is the device that starts a transfer, generates a clock and stops it.
Figure 38-5. Master Mode Typical Application Block Diagram
The following registers have to be programmed before entering Master mode:
After the master initiates a Start condition when writing into the Transmit Holding Register,
TWI_THR, it sends a 7-bit slave address, configured in the Master Mode register (DADR in
• Master transmitter mode
• Master receiver mode
• Multi-master transmitter mode
• Multi-master receiver mode
• Slave transmitter mode
• Slave receiver mode
1. DADR (+ IADRSZ + IADR if a 10 bit device is addressed): The device address is used
2. CKDIV + CHDIV + CLDIV: Clock Waveform.
3. SVDIS: Disable the slave mode.
4. MSEN: Enable the master mode.
Rp: Pull up value as given by the I²C Standard
Host with
Interface
to access slave devices in read or write mode.
TWI
TWD
TWCK
Serial EEPROM
Atmel TWI
Slave 1
I²C RTC
Slave 2
Controller
I²C LCD
Slave 3
I²C Temp.
Sensor
Slave 4
Rp
SAM9G35
SAM9G35
Rp
VDD
761
761
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