AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 334
AT32UC3C2512C Automotive
Manufacturer Part Number
AT32UC3C2512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
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- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
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18.6.8
18.6.8.1
Figure 18-30. Read and Write Cycles in Slow Clock Mode
9166C–AVR-08/11
NBS0, NBS1,
A[AD_MSB:2]
A0, A1
CLK_SMC
NWE
NCS
Slow Clock Mode
Slow clock mode waveforms
SLOW CLOCK MODE WRITE
1
NWECYCLES = 3
The SMC is able to automatically apply a set of “slow clock mode” read/write waveforms when
an internal signal driven by the SMC’s Power Management Controller is asserted because
CLK_SMC has been turned to a very slow clock rate (typically 32 kHz clock rate). In this mode,
the user-programmed waveforms are ignored and the slow clock mode waveforms are applied.
This mode is provided so as to avoid reprogramming the User Interface with appropriate wave-
forms at very slow clock rate. When activated, the slow mode is active on all chip selects.
Figure 18-30 on page 334
valid on all chip selects.
ters in slow clock mode.
Table 18-5.
Read Parameters
NRDSETUP
NRDPULSE
NCSRDSETUP
NCSRDPULSE
NRDCYCLE
1
Read and Write Timing Parameters in Slow Clock Mode
1
Duration (cycles)
Table 18-5 on page 334
illustrates the read and write operations in slow clock mode. They are
1
1
0
2
2
Write Parameters
NWESETUP
NWEPULSE
NCSWRSETUP
NCSWRPULSE
NWECYCLE
NBS0, NBS1,
A[AD_MSB:2]
indicates the value of read and write parame-
A0, A1
CLK_SMC
NRD
NCS
SLOW CLOCK MODE READ
NRDCYCLES = 2
1
Duration (cycles)
AT32UC3C
1
1
0
3
3
1
334
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