AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 493

• Manufacturer Part Number: AT32UC3C2512C Automotive
• Manufacturer: Atmel Corporation

Table 24-2.
24.5.5
9166C–AVR-08/11
Bit
26:17
14:11
10:0
31
30
29
28
27
16
15
Transmit Sub-module
Used. Needs to be zero for the MACB to read data from the transmit buffer. The MACB sets this to one for the first buffer
of a frame once it has been successfully transmitted.
Software has to clear this bit before the buffer can be used again.
Note:
Wrap. Marks last descriptor in transmit buffer descriptor list.
Retry limit exceeded, transmit error detected
Transmit underrun, occurs either when hresp is not OK (bus error) or the transmit data could not be fetched in time or
when buffers are exhausted in mid frame.
Buffers exhausted in mid frame
Reserved
No CRC. When set, no CRC is appended to the current frame. This bit only needs to be set for the last buffer of a frame.
Last buffer. When set, this bit indicates the last buffer in the current frame has been reached.
Reserved
Length of buffer
Transmit Buffer Descriptor Entry (Continued)
This bit is only set for the first buffer in a frame unlike receive where all buffers have the Used bit set once used.
This sub-module transmits frames in accordance with the Ethernet IEEE 802.3 CSMA/CD proto-
col. Frame assembly starts by adding preamble and the start frame delimiter. Data is taken from
the transmit FIFO a word at a time. Data is transmitted least significant nibble first. If necessary,
padding is added to increase the frame length to 60 bytes. CRC is calculated as a 32-bit polyno-
mial. This is inverted and appended to the end of the frame, taking the frame length to a
minimum of 64 bytes. If the No CRC bit is set in the second word of the last buffer descriptor of a
transmit frame, neither pad nor CRC are appended.
In full-duplex mode, frames are transmitted immediately. Back-to-back frames are transmitted at
least 96 bit times apart to guarantee the interframe gap.
In half-duplex mode, the transmitter checks carrier sense. If asserted, it waits for it to de-assert
and then starts transmission after the interframe gap of 96 bit times. If the collision signal is
asserted during transmission, the transmitter transmits a jam sequence of 32 bits taken from the
data register and retries transmission after the back off time has elapsed.
The back-off time is based on an XOR of the 10 least significant bits of the data coming from the
transmit FIFO and a 10-bit pseudo random number. The number of bits used depends on the
number of collisions seen. After the first collision, 1 bit is used, after the second 2, and so on up
to 10. Above 10, all 10 bits are used. An error is indicated and no further attempts are made if 16
attempts cause collisions.
If transmit DMA underruns, bad CRC is automatically appended using the same mechanism as
jam insertion and TX_ER is asserted. In a properly configured system, this should never
happen.
If the back pressure bit is set in the network control register in half duplex mode, the transmit
sub-module transmits 64 bits of data, which can consist of 16 nibbles of 1011 or in bit-rate mode
Function
AT32UC3C
493