AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 806
AT32UC3C2512C Automotive
Manufacturer Part Number
AT32UC3C2512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
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9166C–AVR-08/11
The Master Clock (IMCK) frequency is 8*(NBCHAN+1)*(IMCKFS+1) times the sample fre-
quency (fs), i.e. IWS frequency. The Serial Clock (ISCK) frequency is (NBCHAN+1)*Slot Length
times the sample frequency (fs), where Slot Length is defined in
Table 30-2.
Warning: MR.IMCKMODE should only be written as one if the Master Clock frequency is strictly
higher than the Serial Clock.
If a Master Clock output is not required, the GCLK_IISC generic clock is used as ISCK, by writ-
ing a zero to MR.IMCKMODE. Alternatively, if the frequency of the generic clock used is a
multiple of the required ISCK frequency, the IMCK to ISCK divider can be used with the ratio
defined by writing the MR.IMCKFS field.
The IWS pin is used as Word Select in I2S format and as Frame Synchronization in TDM format,
as described in
MR.DATALENGTH
0
1
2
3
4
5
6
7
Slot Length
Section 30.6.4
16 bits compact stereo
8 bits compact stereo
Word Length
32 bits
24 bits
20 bits
18 bits
16 bits
8 bits
and
Section 30.6.5
32 if MR.IWS24 is zero
24 if MR.IWS24 is one
Slot Length
respectively.
32
16
8
Table 30-2 on page 806
AT32UC3C
.
806
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