AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 362

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AT32UC3C2512C Automotive

Manufacturer Part Number
AT32UC3C2512C Automotive
Description
Manufacturer
Atmel Corporation
19.8.3
Register Name:
Access Type:
Offset:
Reset Value:
• TXSR: Exit Self Refresh to Active Delay
• TRAS: Active to Precharge Delay
• TRCD: Row to Column Delay
• TRP: Row Precharge Delay
• TRC: Row Cycle Delay
• TWR: Write Recovery Delay
• DBW: Data Bus Width
9166C–AVR-08/11
DBW
31
23
15
7
Reset value is eight cycles.
This field defines the delay between SCKE set high and an Activate command in number of cycles. Number of cycles is between
0 and 15.
Reset value is five cycles.
This field defines the delay between an Activate command and a Precharge command in number of cycles. Number of cycles is
between 0 and 15.
Reset value is two cycles.
This field defines the delay between an Activate command and a Read/Write command in number of cycles. Number of cycles
is between 0 and 15.
Reset value is three cycles.
This field defines the delay between a Precharge command and another command in number of cycles. Number of cycles is
between 0 and 15.
Reset value is seven cycles.
This field defines the delay between a Refresh and an Activate Command in number of cycles. Number of cycles is between 0
and 15.
Reset value is two cycles.
This field defines the Write Recovery Time in number of cycles. Number of cycles is between 0 and 15.
Reset value is 16 bits.
0: Reserved.
1: Data bus width is 16 bits.
Configuration Register
30
22
14
6
CR
Read/Write
0x08
0x852372C0
TRCD
TXSR
TRC
CAS
29
21
13
5
NB
28
20
12
4
27
19
11
3
NR
26
18
10
2
TRAS
TWR
TRP
25
17
9
1
AT32UC3C
NC
24
16
8
0
362

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