AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 763
AT32UC3C2512C Automotive
Manufacturer Part Number
AT32UC3C2512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
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29.6.1.2
29.6.1.3
29.6.1.4
9166C–AVR-08/11
Sampling method
Operating modes
Overrun mode
Table 29-2.
The bit duration is given by the formula:
Note: PRES should not be set to 0, therefore CAN clock is at least divided by 2.
Bits are sampled between PHASE_SEG1 and PHASE_SEG2. By writing the Sampling Method
bit (CANCFG.SM) to one, three samples are taken and a majority vote is performed.
Figure 29-3. Sampling by Majority Voting
Majority voting must not be used when the Prescaler field (CANCFG.PRES) is equal to zero.
CANIF has three operating modes, selectable by the Channel Mode field (CANCFG.CMODE):
When Overrun Mode is disabled, the MOb is disabled after successfully receiving a message.
This prevents overwriting the received message if a second message is received. Overrun Mode
is disabled by writing a zero to CANCFG.OVRM. Overrun Mode is disabled by default.
Sync Jump Width
PHASE_SEG2
– Normal mode (CANCFG.CMODE=00)
– Listening mode (CANCFG.CMODE=01)
– Loop back mode (CANCFG.CMODE=10)
Parameter
Prescaler
Default mode, TX and RX lines are connected to the transceiver. This mode is used
to communicate with other nodes on the bus.
The TX line is disconnected from the transceiver. The CAN channel cannot send any
message nor acknowledge when a message has been received. The channel is in
Error Passive mode and Transmit/Receive Error Counters (TEC/REC) are frozen.
This mode is used to listen to CAN bus.
The TX line is internally connected to the RX line and disconnected from the
transceiver. The CAN channel can only send messages or acknowledges to itself.
The channel is in Error Passive mode and TEC/REC are frozen. This mode is used
to detect the bit rate of the CAN bus by successive configuration of bit timing.
Tbit = (PRS + PHS1 + PHS2 + 4) x (PRES + 1) x
CAN Parameter Settings
CAN clock
Samples
[1..8]TQ
Range
[2..32]
[1..4]
Bit
PHASE_SEG1
CANCFG field
S1
PRES + 1
PHS2 + 1
SJW + 1
S2
SP
PHASE_SEG2
P
GCLK_CANIF
AT32UC3C
763
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