ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 116

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ST7DALIF2

Manufacturer Part Number
ST7DALIF2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7DALIF2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
10-bit A/D converter (ADC)
18.6
18.7
18.7.1
116/171
Table 50.
Interrupts
None.
Register description
Control/status register (ADCCSR)
Read/Write (Except bit 7 read only)
Reset Value: 0000 0000 (00h)
Bit 7 = EOC End of Conversion
It is cleared by hardware when software reads the ADCDRH register or writes to any bit of
the ADCCSR register.
0: Conversion is not complete
1: Conversion complete
Bit 6 = SPEED ADC clock selection
This bit is set and cleared by software. It is used together with the SLOW bit to configure the
ADC clock speed. Refer to the table in the SLOW bit description.
Bit 5 = ADON A/D Converter on
This bit is set and cleared by software.
0: A/D converter and amplifier are switched off
1: A/D converter and amplifier are switched on
Bits 4:3 = Reserved. Must be kept cleared.
Bits 2:0 = CH[2:0] Channel Selection
These bits are set and cleared by software. They select the analog input to convert.
Table 51.
EOC
7
Mode
Wait
Halt
Effect of low power modes on ADC
Channel selection bits
SPEED
No effect on A/D Converter
A/D Converter disabled.
After wakeup from Halt mode, the A/D Converter requires a stabilization time
t
performed.
STAB
Channel pin
(see Electrical Characteristics) before accurate conversions can be
AIN0
AIN1
AIN2
ADON
(1)
0
Description
CH3
CH2
0
0
0
CH2
CH1
CH1
0
0
1
ST7DALIF2
CH0
CH0
0
1
0
0

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