ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 150

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ST7DALIF2

Manufacturer Part Number
ST7DALIF2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7DALIF2

8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
Electrical characteristics
150/171
RESET pin protection when LVD is enabled
When the LVD is enabled, it is recommended to protect the RESET pin as shown in
Figure 87
1.
2.
3.
4.
5.
6.
Tips when using the LVD:
Figure 87. RESET pin protection when LVD is enabled.
EXTERNAL
RESET
The reset network protects the device against parasitic resets.
The output of the external reset circuit must have an open-drain output to drive the ST7
reset pad. Otherwise the device can be damaged when the ST7 generates an internal
reset (LVD or watchdog).
Whatever the reset source is (internal or external), the user must ensure that the level
on the RESET pin can go below the V
the reset will not be taken into account internally.
Because the reset circuit is designed to allow the internal RESET to be output in the
RESET pin, the user must ensure that the current sunk on the RESET pin (by an
external pull-up for example) is less than the absolute maximum value specified for
I
When the LVD is enabled, it is mandatory not to connect a pull-up resistor. A 10nF pull-
down capacitor is recommended to filter noise on the reset line.
In case a capacitive power supply is used, it is recommended to connect a 1M ohm
pull-down resistor to the RESET pin to discharge any residual voltage induced by this
capacitive power supply (this will add 5 µA to the power consumption of the MCU).
Check that all recommendations related to reset circuit have been applied (see section
above)
Check that the power supply is properly decoupled (100 nF + 10 µF close to the MCU).
Refer to AN1709. If this cannot be done, it is recommended to put a 100 nF + 1M Ohm
pull-down on the RESET pin.
The capacitors connected on the RESET pin and also the power supply are key to
avoiding any start-up marginality. In most cases, steps 1 and 2 above are sufficient for a
robust solution. Otherwise: Replace 10 nF pull-down on the RESET pin with a 5 µF to
20 µF capacitor.
INJ(RESET)
and follow these guidelines:
Required
0.01μF
in
Section 20.2 on page
1MΩ
Optional
V
DD
128.
R
ON
IL
Filter
max. level specified in
GENERATOR
PULSE
Section
WATCHDOG
ILLEGAL OPCODE
LVD RESET
INTERNAL
RESET
20.8. Otherwise
ST72XXX
ST7DALIF2

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