TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 106

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

Up
counter
Comparator
timing
Comparator output
(match detect)
<TA1RUN>
TA01RUN
UC1 Clear
TA1OUT
Bit7 to 2
INTTA1
TA1FF
X: Don’t care, −: No change
TA01RUN
TA01MOD
TA1REG
TA1FFCR
PAFC2
TA01RUN
Bit 1
Bit 0
φ
Example: To output a 1.2-μs square wave pulse from the TA1OUT pin at fc = 36 MHz, use
T1
b. Generating a 50% duty ratio square wave pulse
status output via the timer output pin (TA1OUT).
The state of the timer flip-flop (TA1FF) is inverted at constant intervals and its
0
Figure 3.7.10 Square Wave Output Timing Chart (50% duty)
← –
← 0
← 0
← X
← X
← –
the following procedure to make the appropriate register settings. This example
uses TMRA1; however, either TMRA0 or TMRA1 may be used.
∗ Clock state
7
1
6
X
0
0
X
X
X
System clock: High-frequency (fc)
Clock gear: 1 (fc)
Prescaler clock: f
5
X
X
0
X
X
X
2
4
X
X
0
X
X
X
3
–
0
0
1
–
–
3
2
–
1
0
0
–
1
FPH
91C025-104
0
1
0
–
1
1
1
1
0.6 μs at fc = 36 MHz
0
–
–
1
1
–
–
1
2
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and select φT1 ((2
MHz) as the input clock.
Set the timer register to 1.2 μs ÷ φT1(2
Clear TA1FF to 0 and set it to invert on the match detects
signal from TMRA1.
Set PA1 to function as the TA1OUT pin.
Start TMRA1 counting.
3
0
1
2
3
3
/fc) ÷ 2 = 3
0
TMP91C025
3
/fc)s at fc = 36
2007-02-28