TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 228

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

Note: Since the CPU accesses the internal area to read data from a port, the control signals of external
EA24 to EA25,
(3) Read cycle
pins such as
regarded as depicting internal operation. Please also note that the timing and AC characteristics of
port input/output shown above are typical representation. For details, contact your local Toshiba
sales representative.
D0 to D15
A23 to A0
Port input
SRWR
(Note)
WAIT
f
SRUB
FPH
R/
SRLB
CSn
RD
W
RD
and
t
FPH
t
AC
CS
are not enabled. Therefore, the above waveform diagram should be
t
t
t
AW
AP
t
APH2
AD
91C025-227
t
SBA
t
RD
t
RR
t
CW
D0 to D15
t
HR
t
CAR
TMP91C025
2007-02-28