TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 214

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

3.14.5
RAM Built-in Type LCD Driver Control Mode (RAM Type)
executed LCDC outputs chip select signal to LCD driver connected to the outside from
control pin. (D1BSCP etc.)
by instruction of CPU. There are 2 kinds of addresses of LCD driver in this case, and which
is chosen determines by LCDCTL<MMULCD> register.
data register in LCD driver at the time of <MMULCD> = 0. Please make the transmission
place address at this time into either of FE0H to FE7H. (Table 3.14.2 references)
The transmission place address at this time can also assign the memory area of 3C0000H
to 3FFFFFH to four areas for every 64 Kbytes. (Table 3.14.3 references)
3.14.12 at the time below. [<MMULCD> = 0]
Data transmission to LCD driver is executed by move instruction of CPU.
After setting mode of operation to control register, when move instruction of CPU is
Therefore control of data transmission numbers corresponding to LCD size is controlled
It corresponds to LCD driver which has every 1 byte of instruction register and display
It corresponds to address direct writing type LCD driver at the time of <MMULCD> = 1.
The example of a setting is shown as follows and connection example is shown in Figure
(Setting example)
micro DMA by soft start in setting of display data.
In case of use 80 SEG × 65 COM LCD driver.
Assign external column driver to LCDC0 and row driver to LCDR0.
This example used LD instruction in setting of instruction and used burst function of
; Setting external terminal
; Setting for LCDC
; Setting for mode of LCDC1/LCDR1
; Setting for micro DMA and INTTC (ch0)
In case of store 650 bytes transfer data to LCD
driver in built-in RAM (1000H to 1289H).
LD
LD
LD
LD
LD
LD
LDC DMAM0, A
LD
LDC DMAC0, WA
LD
LDC DMAS0, XWA
LD
LDC DMAD0, XWA
LD
EI
LD
LD
(PDCR), 19H
(LCDSAL), 00H
(LCDCTL), 80H
(LCDC1L), XX
(LCDR1L), XX
A, 08H
WA, 650
XWA, 1000H
XWA, 0FE1H
(INTETC01), 06H ; INTTC0 level = 6
6
(DMAB), 01H
(DMAR), 01H
91C025-213
;
;
; Setting for/DOFF
; Select RAM mode
; LCDON
; Setting instruction for LCDC1
; Setting instruction for LCDR1
; Source address INC mode
;
; count = 650
;
; Source address = 1000H
;
; Destination address = FE1H (LCDC0H)
;
;
; Burst mode
; Soft start
CE
LE
for LCDC1: D1BSCP,
for LCDR1: DLEBCD,
TMP91C025
2007-02-28