TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 233

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

4.9
Note:
Width
Read
Word
Bus
Byte
LCD Controller (SR mode)
EA24 to EA25,
Value of alpha, beta and gamma are showed next page.
A23 to A0,
f
TYPE
D0 to D7
SYS
D1BSCP
A
B
C
A
B
C
CSn
Mode
Write
Nibble
Nibble
Nibble
Nibble
Nibble
Nibble
Byte
Byte
Byte
Byte
Byte
Byte
Setup Time
0.5x − α
0.5x − α
1.0x − α
1.0x − α
1.0x − α
1.0x − α
0.5x − α
0.5x − α
1.0x − α
1.0x − α
1.0x − α
1.0x − α
(t
DSU
)
91C025-232
Hold Time
(t
1.0x − β
1.0x − β
0.5x − β
0.5x − β
2.5x − β
1.5x − β
1.0x − β
1.0x − β
0.5x − β
0.5x − β
1.5x − β
1.5x − β
DHD
)
t
CWH
t
DSU
Clock High
Data
(t
1.5x − γ
1.0x − γ
2.0x − γ
1.0x − γ
1.5x − γ
2.5x − γ
1.0x − γ
1.0x − γ
1.0x − γ
1.0x − γ
1.5x − γ
2.5x − γ
Width
CWH
t
DHD
)
t
C
Cycle
t
(tc)
4.0x
2.0x
4.0x
2.0x
6.0x
5.0x
2.0x
2.0x
2.0x
2.0x
3.0x
5.0x
CWL
State/
Cycle
10.0x
10.0x
10.0x
20.0x
4.0x
6.0x
4.0x
6.0x
6.0x
6.0x
6.0x
8.0x
TMP91C025
2007-02-28