TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 119

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

LOCAL1
(0351H)
LOCAL2
(0352H)
LOCAL3
(0353H)
LOCAL0
(0350H)
3.8.2
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Control Registers
area. At this time, also specify the pin function and mapping by the CS/WAIT controller.
When the CPU outputs the logical address of the local area, the MMU outputs its physical
address to the external address bus pin according to the value in the bank setting register.
This enables access to external memory.
Set a bank setting value and bank enable/disable in each local register in the common
BANK for
LOCAL2
0: Disable
1: Enable
BANK for
LOCAL0
0: Disable
1: Enable
BANK for
LOCAL1
0: Disable
1: Enable
BANK for
LOCAL3
0: Disable
1: Enable
R/W
R/W
R/W
L2E
R/W
L0E
L1E
L3E
7
7
7
0
7
0
0
0
6
6
6
6
Figure 3.8.3 Register of MMU
LOCAL0 Register
LOCAL1 Register
LOCAL2 Register
5
LOCAL3 Register
5
5
5
91C025-117
Always
write 0.
R/W
4
4
4
4
−
0
0000~0011:
0100~0111:
1000~1111: Set prohibition
L3EA25
R/W
3
3
3
3
0
“111” setting is prohibited because it
Setting BANK number for LOCAL0
“000” setting is prohibited because it
Setting BANK number for LOCAL1
“001” setting is prohibited because it
CS2B
CS2C
Setting BANK number for LOCAL2
L2EA23
L0EA22
L1EA23
L3EA24
R/W
2
2
2
0
0
0
pretend COMMON 0 area
2
pretend COMMON 0 area
pretend COMMON 0 area
0
L2EA22
L3EA23
L0EA21
L1EA22
R/W
R/W
R/W
R/W
1
1
1
1
0
0
0
0
L2EA21
L3EA22
L0EA20
L1EA21
TMP91C025
R/W
0
0
0
0
0
0
2007-02-28
0
0