TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 111

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

TA01RUN
TA01MOD
TA0REG
TA1REG
TA1FFCR
PAFC2
TA01RUN
X: Don’t care, −: No change
(Example)
To generate 1/4-duty 50 kHz pulses (at fc = 36 MHz):
To obtain a frequency of 50 kHz, the pulse cycle t should be: t = 1/50 kHz = 20 μs
φT1 = (2
Therefore set TA1REG to 90 (5AH)
The duty is to be set to 1/4: t × 1/4 = 20 μs × 1/4 = 5 μs
Therefore, set TA0REG = 22 = 16H.
Calculate the value which should be set in the timer register.
20 μs ÷ (2
5 μs ÷ (2
← 0
← 1
← 0
← 0
← X
← X
← 1
3
/fc)s (at 36 MHz);
∗ Clock state
7
6
X
0
0
1
X
X
X
System clock: High-frequency (fc)
Clock gear: 1 (fc)
Prescaler clock: f
3
/fc)s ≈ 22
3
/fc)s ≈ 90
5
X
X
0
0
X
X
X
20 μs
4
X
X
1
1
X
X
X
3
–
X
0
1
0
–
–
2
0
X
1
0
1
–
1
FPH
91C025-109
1
0
0
1
1
1
1
1
0
0
1
0
0
X
–
1
Stop TMRA0 and TMRA0, 1 and clear it to 0.
Set the 8-bit PPG mode, and select φT1 as input clock.
Write 16H
Write 5AH
Set TA1FF, enabling both inversion and the double buffer.
Writing 10 provides negative logic pulse.
Set PA1 as the TA1OUT pin.
Start TMRA0 and TMRA01 counting.
TMP91C025
2007-02-28