TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 145

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
3.9.4
Output extension
External clock
Output extension
Operation in Each Mode
(1) Mode 0 (I/O interface mode)
TMP91C025
TMP91C025
data to or receiving data from an external shift register.
SCLK input mode to input external synchronous clock SCLK.
This mode allows an increase in the number of I/O pins available for transmitting
This mode includes the SCLK output mode to output synchronous clock SCLK and
SCLK
SCLK
TXD
Port
TXD
Port
Figure 3.9.17 SCLK Output Mode Connection Example
Figure 3.9.18 SCLK Input Mode Connection Example
TC74HC595 or equivalent
TC74HC595 or equivalent
Shift register
Shift register
SI
SCK
RCK
SI
SCK
RCK
91C025-143
G
A
B
C
D
E
H
F
G
C
D
H
A
B
E
F
External clock
Input extension
Input extension
TMP91C025
TMP91C025
SCLK
SCLK
RXD
RXD
Port
Port
TC74HC165 or equivalent
TC74HC165 or equivalent
Shift register
Shift register
QH
CLOCK
S/
QH
CLOCK
S/
L
L
TMP91C025
2007-02-28
C
D
G
H
A
B
E
F
G
C
D
H
A
B
E
F

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