TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 32

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

3.3.7
Block
SYSCR2<HALTM1:0>
CPU
I/O ports
TMRA
SIO
AD converter
WDT
LCDC,
Interrupt controller
RTC, MLD
Standby Controller
(1) HALT modes
HALT Mode
IDLE1 or STOP mode, depending on the contents of the SYSCR2<HALTM1:0>
register.
b. IDLE1: Only the oscillator and the RTC (Real-time clock) and MLD continue to
c.
a.
When the HALT instruction is executed, the operating mode switches to IDLE2,
The subsequent actions performed in each mode are as follows:
operate.
STOP: All internal circuits stop operating.
IDLE2: Only the CPU halts.
the following register.
The internal I/O is available to select operation during IDLE2 mode. By setting
Table 3.3.2 Shows the registers of setting operation during IDLE2 mode.
The operation of each of the different HALT modes is described in Table 3.3.3.
Table 3.3.2 SFR Setting Operation during IDLE2 Mode
TMRA01
TMRA23
SIO0
SIO1
AD converter
WDT
Table 3.3.3 I/O Operation during HALT Modes
Internal I/O
Keep the state when the HALT instruction
Available to select
operation block
was executed.
91C025-30
IDLE2
Operate
11
TA01RUN<I2TA01>
TA23RUN<I2TA23>
SC0MOD1<I2S0>
SC1MOD1<I2S1>
ADMOD1<I2AD>
WDMOD<I2WDT>
SFR
Stop
Possible to operate
See Table 3.3.6,
IDLE1
10
Stop
Table
STOP
01
3.3
TMP91C025
2007-02-28
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