TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 199

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
Note: We call built-in RAM sequential access type LCD driver that use register to access to display-ram
LCDC1L
LCDC1H
LCDC2L
LCDC2H
LCDC3L
LCDC3H
LCDR1L
LCDR1H
without address. (e.g., T6B65A,T6C84 etc: mar/2000)
We call built-in RAM random access type LCD driver that is same method to access to SRAM.
(e.g., T6C23, T6K01 etc: mar/2000)
Register
Table 3.14.2 Memory Mapping for Direct Addressed Built-in RAM Type
Table 3.14.3 Memory Mapping for Built-in RAM Random Access Type
3C0000H to
3CFFFFH
3D0000H to
3DFFFFH
3E0000H to
3EFFFFH
3F0000H to
3FFFFFH
Address
Address
0FE1H
0FE3H
0FE5H
0FE7H
0FE0H
0FE2H
0FE4H
0FE6H
RAM built-in type driver 1
RAM built-in type driver 2
RAM built-in type driver 3
RAM built-in type driver 4
RAM built-in type
column driver 1
RAM built-in type
column driver 2
RAM built-in type
column driver 3
RAM built-in type row
driver
Random Access Type
Sequential Access Type
91C025-198
Purpose
Purpose
Instruction
Display data
Instruction
Display data
Instruction
Display data
Instruction
Display data
Chip Enable
Chip Enable
Terminal
DLEBCD
D1BSCP
D3BFR
D2BLP
Terminal
D1BSCP
DLEBCD
D3BFR
D2BLP
Terminal
A0
0
1
0
1
0
1
0
1
TMP91C025
2007-02-28

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