XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 194

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

Enhanced Capture Timer (ECT) Module
13.4.18 Input Control Overwrite Register
13.4.19 Input Control System Control Register
Data Sheet
194
Read: Anytime
Write: Anytime
An IC register is empty when it has been read or latched into the holding register.
A holding register is empty when it has been read.
NOVWx — No Input Capture Overwrite Bits
Read: Anytime
Write: May be written once (SMODN = 1). Writes are always permitted when
SHxy — Share Input Action of Input Capture Channels x and y Bits
TFMOD — Timer Flag-Setting Mode Bit
Use of the TFMOD bit in the ICSYS register ($AB) in conjunction with the use
of the ICOVW register ($AA) allows a timer interrupt to be generated after
capturing two values in the capture and holding registers instead of generating
an interrupt for every capture.
Address: $00AA
Address: $00AB
Reset:
Reset:
Read:
Read:
Write:
Write:
0 = The contents of the related capture register or holding register can be
1 = The related capture register or holding register cannot be written by an
0 = Normal operation
1 = The channel input x causes the same action on the channel y. The port
SMODN = 0.
Figure 13-40. Input Control System Control Register (ICSYS)
overwritten when a new input capture or latch occurs.
event unless they are empty (see
the captured value to be overwritten until it is read or latched in the
holding register.
pin x and the corresponding edge detector is used to be active on the
channel y.
Figure 13-39. Input Control Overwrite Register (ICOVW)
NOVW7
SH37
Bit 7
Bit 7
Enhanced Capture Timer (ECT) Module
0
0
NOVW6
SH26
6
0
6
0
NOVW5
SH15
5
0
5
0
NOVW4
SH04
4
0
4
0
13.3.1 IC
NOVW3
TFMOD
3
0
3
0
Channels). This will prevent
NOVW2
PACMX
M68HC12B Family — Rev. 8.0
2
0
2
0
NOVW1
BUFEN
1
0
1
0
MOTOROLA
NOVW0
LATQ
Bit 0
Bit 0
0
0