XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 41

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
2.1 Introduction
M68HC12B Family — Rev. 8.0
MOTOROLA
Data Sheet — M68HC12B Family
NOTE:
The register block can be mapped to any 2-Kbyte boundary within the standard
64-Kbyte address space by manipulating bits REG15–REG11 in the register
initialization register (INITRG). INITRG establishes the upper five bits of the
register block’s 16-bit address. The register block occupies the first 512 bytes of
the 2-Kbyte block.
Default addressing (after reset) is indicated in
information, refer to
In expanded and peripheral modes, these registers are not in the map:
In peripheral mode or in expanded modes with the emulate port E bit (EME) set,
these registers are not in the map:
In peripheral mode, these registers are not in the map:
Port A data register, PORTA
Port B data register, PORTB
Port A data direction register, DDRA
Port B data direction register, DDRB
Port E data register, PORTE
Port E data direction register, DDRE
Mode register, MODE
Pullup control register, PUCR
Reduced drive register, RDRIV
Section 5. Operating Modes and Resource
Register Block
Section 2. Register Block
Figure
2-1. For additional
Mapping.
Data Sheet
41

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