XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 21

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

1.3 Slow-Mode Clock Divider Advisory
M68HC12B Family — Rev. 8.0
MOTOROLA
Current versions of the M68HC12B-series devices include a slow-mode clock
divider feature. This feature is fully described in Section 10. Clock Generation
Module (CGM). The register that controls this feature is located at $00E0. Older
device mask sets do not support the slow-mode clock divider feature. This register
address is reserved in older devices and provides no function.
Mask sets that do not have the slow-mode clock divider feature on the
MC68HC912B32 include: G96P, G86W, and H91F.
Mask sets that do not have the slow-mode clock divider feature on the
MC68HC12BE32 include: H54T and J38M.
Mask sets that do not have the slow-mode clock divider feature on the
MC68HC(9)12BC32 include: J15G.
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16-bit pulse accumulator:
–
–
Pulse-width modulator (PWM):
–
–
–
Serial interfaces:
–
–
–
–
Computer operating properly (COP) watchdog timer, clock monitor, and
periodic interrupt timer
Slow-mode clock divider
80-pin quad flat pack (QFP)
Up to 63 general-purpose input/output (I/O) lines
Single-wire background debug mode (BDM)
On-chip hardware breakpoints
External event counting
Gated time accumulation
8-bit, 4-channel or 16-bit, 2-channel
Separate control for each pulse width and duty cycle
Programmable center-aligned or left-aligned outputs
Asynchronous serial communications interface (SCI)
Synchronous serial peripheral interface (SPI)
J1850 byte data link communication (BDLC), MC68HC912B32 and
MC68HC12BE32 only
Controller area network (CAN), MC68HC(9)12BC32 only
General Description
Slow-Mode Clock Divider Advisory
General Description
Data Sheet
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