SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 190

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

6.0
The purpose of this document is to describe the methodology behind determining the frame rate
on any given panel hooked up to an SPC8104. With the information on how to determine the
frame rate, the reader can then extrapolate the data to adjust the frame rate on any give panel.
(i.e., modification of the Horizontal and Vertical Non-Display periods).
SPC8104F0A panel frame rate depends on several factors:
Programming Notes and Examples
SP3-36
1. The pixel clock: this is dependent on the input clock (typically 24MHz) and Integer and Fractional clock di-
2.
3. Vertical total, this is the sum of vertical display and non-display periods:
4. 4-bit or 8-bit mode
vide:
Clock Divide factors (integer and fractional) are programmed in AUX[04h].
The relation between frame rate and panel geometry can be calculated using the following formaulae:
single 8-bit panel:
single 4-bit panel, dual 8 bit panel:
Based on these formulae, panel frame rate can be modified with the following restriction: horizontal non-dis-
play period must not be smaller than 12 (0Ch). Check the SPC8104F0A Hardware Functional Specification
for restrictions on the operating range of the input clock.
The following code fragment illustrates how to calculate the current frame rate:
double CalcFrameRate(void)
Horizontal total, this is the sum of horizontal display and non-display
ADJUSTING THE SPC8104 FRAME RATE
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
{
int panel,i,c10,c12,c05,c01,aux2;
long vtotal;
double FR,clock;
static clockdiv[4] = {1,2,4,4};
static frac[4] = {8,7,6,5};
panel = 0;
aux2 = ReadAuxReg(0x2);
c12
c10
c01
c05
if( aux2 & 0x20)
{
panel = 1;
if( aux2 & 0x10 )
}
= ReadBreg(0x12);
= ReadBreg(0x10);
= ReadBreg(0x01);
= ReadBreg(0x05);
PixelClock = FclkI/(FracClockDivide*IntegerClockDivide)
Htotal = (CRTCB[01h] + CRTCB[05h])
Vtotal = (CRTCB[10h] + CRTCB[12h]*2)
FR = FclkI/[8*Htotal*Vtotal*FracClockDivide*SlowClock]
FR = FclkI/[16*Htotal*Vtotal*FracClockDivide*SlowClock]
panel = 2;
/* assume dual 8bit */
/* single panel */
/* 8bit single
/* 4bit single
*/
*/
periods:
412-1.0
SPC8104