SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 91

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SPC8104

Manufacturer Part Number
SPC8104
Description
VGA LCD CONTROLLER
Manufacturer
S-MOS Systems
Datasheet

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bits 7-0
bits 4-0
bits 7-3
bits 2-0
Miscellaneous Registers
SPC8104
0D Test / Scratch Register RW
bit 7
0E Auxiliary Enable Register RW
n/a
0F Secondary Revision Code Register RO
bit 4
Miscellaneous Output Register
3C2h W
Dummy
VRTC
Polarity
bits 7, 6, 3, 2, and 1 of this register are dummy read/write bits that have no effect in hardware.
These read/write bits are provided for compatibility of some software which expects to read valid
settings in these VGA standard bits.
412-1.0
bit 6
n/a
bit 3
3CCh R
Dummy
HRTC
Polarity
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
Test / Scratch Bits [7:0]
For normal operation, the Core Test Enable input pin (TSTCO) is low, and the Test/Scratch register
can be used to provide 8 bits of read/write temporary storage. In normal operation mode these bits
have no effect on hardware. When the TSTCO input pin is high, the chip is placed in a special test
mode, and this register is used to select various internal test functions.
Auxiliary Enable Code Bits [4:0]
The Auxiliary Enable Register can be used to prevent application software from accidentally over-
writing the Auxiliary Registers (3DF index 0-F). When disabled, the only Auxiliary Registers that
can be accessed are the Auxiliary Index Register (3DEh) and the Auxiliary Enable Register (3DFh
index 0Eh). The Auxiliary Registers are disabled by writing any value to the Auxiliary Enable Regis-
ter (index 0Eh), including the enable code 1Ah (the upper 3 bits of the enable byte are ignored).
The Auxiliary Registers are enabled for access after the enable code 1Ah is written to and then
read back from the Auxiliary Enable Register.
After a RESET, the Auxiliary Registers are disabled.
Product Code Bits [4:0]
The Product Code bits are read-only bits that are permanently fixed to the product code of the chip.
For the SPC8104, the product code is 00010b.
Revision Code Bits [2:0]
These are the read-only secondary revision code bits that are permanently fixed to the current revi-
sion code of the chip. Note that the primary revision code bits 2-0 in the Primary Revision Code
Register (index 08h) are always set to 1. For the SPC8104, the secondary revision code is 001b.
bit 5
n/a
bit 2
Odd/Even
Page bit
Product
bit 4
bit 4
bit 1
n/a
Test / Scratch Bits
X15-SP-001-08.1
bit 3
bit 3
bit 0
bit 1
Dummy Clk Select
Auxiliary Enable Code (1Ah)
bit 0
bit 2
bit 2
bit 2
Hardware Functional Specification
bit 1
bit 1
bit 1
Dummy
Enable
Video RAM
Revision
bit 0
bit 0
bit 0
3Dx/3Bx
Select
SP1-65

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