SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 58

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

7.6
Hardware Functional Specification
Symbol
SP1-32
t10
t11
t12
t13
t14
t15
t16
t17
t1
t2
t3
t4
t5
t6
t7
t8
t9
DRAM Write Cycle Timing
MA[9:0] row address setup to RAS# asserted
MA[9:0] row address hold from RAS# asserted
RAS# precharge
RAS# pulse width
RAS# asserted to LCAS#, UCAS# asserted
MA[9:0] col. address setup to LCAS#, UCAS# asserted (1st)
MA[9:0] col. address hold from LCAS#, UCAS# asserted (1st)
LCAS#, UCAS# asserted to RAS# negated
LCAS#, UCAS# pulse width
MD[15:0] data setup to LCAS#, UCAS# asserted
MD[15:0] data hold from LCAS#, UCAS# asserted
MA[9:0] col. address setup to LCAS#, UCAS# asserted (2
MA[9:0] col. address hold from LCAS#, UCAS# asserted (2
LCAS#, UCAS# precharge
WE# setup to LCAS#, UCAS# asserted
WE# hold from LCAS#, UCAS# asserted
WE# low pulse width
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MD[15:0]
MA[9:0]
LCAS#
UCAS#
RAS#
WE#
Figure 9 : DRAM Write Cycle Timing
Parameter
Table 0-24 DRAM Write Cycle Timing
t3
t1
row
t2
t5
t15
t10
t6
X15-SP-001-08.1
valid
column 1
t17
t16
t11
t9
t4
t7
Source: a000075.cdr
nd
t14
t15
nd
)
)
t12
t10
3.5Ts-10
1.5Ts-10
0.5Ts-10
valid
0.5Ts-5
0.5Ts-2
0.5Ts-2
0.5Ts-2
0.5Ts-5
0.5Ts-8
0.5Ts-5
0.5Ts-5
2Ts-12
Ts-15
Ts-13
Ts-10
Ts-10
Ts-10
Min
t17
column 2
t16
t11
t8
t9
t13
Typ
Max
412-1.0
SPC8104
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns