SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 43

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

5.1
The logic value at pin MD[6] during RESET is used to determine memory configuration (1 -
256Kx16 with “2 CAS with 1 WE” or “1 CAS with 2 WE” type DRAMs). The pinout diagram is
labelled with the pin names for the default configuration of single 256Kx16 DRAM with 2 CAS and
1 WE signals. The MD[6] pin does not have an internal pullup resistor, so an external resistor is
required for this default case. Refer to the following table for details.
5.2
Non-italicized pin names are the default configuration and correspond to the names on the pinout
diagram.
5.3
Two addressing configurations of 256Kx16 DRAMs are supported by the SPC8104:
The SPC8104 is designed to accommodate both types of 256Kx16 DRAMs directly without any
special configuration options required. The full addressing space is available for either memory
configuration. The only difference is that in the installation of the 10x8 type of DRAM, an extra
row/column address output pin of the SPC8104 (MA[9]) must be connected to the DRAM. For the
9x9 DRAM, only 9 row/column address pins exist, so MA[9] from the SPC8104 is left uncon-
nected.
SPC8104
Table 0-4 DRAM Configuration Pin Mapping
412-1.0
MD[6]
0
1
Pin #
52
53
56
1024 x 256 x 16
512 x 512 x 16
Video Memory Interface Options
Pin mapping for various DRAM configurations
Address Mapping for 256Kx16 DRAMs
MD[6] = 1
UCAS#
WE#
LCAS#
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
Table 0-3 Video Memory Interface Options
1 / 256Kx16
1 / 256Kx16
# DRAM / size
10 row address bits
9 row address bits
MD[6] = 0
CAS#
UWE#
LWE#
CAS/WE Configuration
1 CAS, 2 WE
2 CAS, 1 WE
X 8 column address bits
X 9 column address bits
X15-SP-001-08.1
Hardware Functional Specification
SP1-17