SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 45
SPC8104
Manufacturer Part Number
SPC8104
Description
VGA LCD CONTROLLER
Manufacturer
S-MOS Systems
Datasheet
1.SPC8104.pdf
(306 pages)
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SPC8104
Pin Name
YD
LP
XSCL
UD[0:3]
LD[0:3]
LCDPWR#
WF
412-1.0
Type
O
O
O
O
O
O
O
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
Pin #
25
26
23
34~37
28~31
27
24
Drive
TS2
TS2
TS2
TS2
TS2
CO2
TS2
Table 0-8 LCD Panel Interface
Description
Vertical Scanning Start Pulse output. A logic 1 on this signal, sampled
by the LCD/MIM panel module on the falling edge of LP, is used by
the panel row drivers (Y drivers) to indicate the start of the vertical
frame.
Latch Pulse output. The falling edge of this signal is used to latch a
row of display data in the LCD/MIM panel module’s column driver shift
registers and to turn on the row driver (Y driver) for that line.
Shift Clock for LCD panel data or Pixel Clock for MIM panel data.
Display data is clocked out of the chip on the rising edge of this signal,
to be shifted into the LCD/MIM panel module column drivers (X
drivers) on each falling edge.
Upper panel display data for dual LCD panel mode. For single LCD
panel mode, these bits are the most significant 4 bits of the 8 bit
output data to the panel (PD[4:7]). For 4-bit single LCD panel mode,
these bits are the 4 bits of output data to the panel. For 4-bit MIM
panel mode, these bits are driven 0.
Lower panel display data for dual LCD panel mode. For 8-bit single
LCD panel mode, these bits are the least significant 4 bits of the 8 bit
output data to the panel (PD[0:3]). For 4-bit single LCD panels, these
bits are driven 0. For 4-bit MIM panel mode, these are the 4 bits of
output data to the panel.
LCD power control. In normal operation this signal is driven low to
enable an external LCD power supply. This signal is driven high when
the chip is put into any Suspend mode, or if the Sequencer is in a
reset state. It can be used externally to turn off the panel supply
voltage and backlight. After a RESET, this signal is held high until the
CRTC is programmed and running.
LCD Panel Backplane Bias Signal or MIM Panel Data Enable Signal.
In LCD panel mode, the WF signal toggles once per vertical frame
period. In MIM panel mode, this signal goes high whenever display
data are valid.
X15-SP-001-08.1
Hardware Functional Specification
SP1-19
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