SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 20

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

Power Save Mode Control
Configuration Options
Multiple Function Pin Descriptions
Mixed Voltage Configurations
Data Sheet
Pin Name
PDCLK
SUSPEND#
DOZE#
DS-14
Pin Name
LCAS#, LWE#
UCAS#, CAS#
WE#, UWE#
Pin Name
MD[3:0]
MD[5]
MD[6]
Core V
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
2.5 V
3.3 V
DD
Type
I
I
I
value on this pin at falling edge of RESET is used to configure:
values latched into read-only AUX[0C] bits 7-4 for software use
LCD signals’ state in Suspend mode: Low (1), or Hi-Z (0)
2 CAS, 1 WE type DRAM (1), or 1 CAS, 2 WE type DRAM (0)
2.5 V
No
No
Pin #
79
80
81
Function
LCAS#
LWE#
UCAS#
CAS#
WE#
UWE#
I/O V
DD
3.3 V
Yes
Yes
Description
Power Down Clock. This input may be used to provide a low frequency clock for
generating DRAM refresh in Suspend mode, as an optional alternative to using the
pixel clock or MEMEN input as the DRAM refresh clock source. This clock input
should be driven by a 32 kHz 50% duty cycle clock. The PDCLK input is used to
directly generate the RAS and CAS pulses in Suspend mode.
A low level on this pin puts the chip into the hardware Suspend mode. The
SUSPEND# signal overrides any software initiated power save modes as well as
the DOZE# input pin, and disables the CPU bus interface inputs. CPU Address and
Data inputs are masked when this signal is low. When in Suspend Mode the
UD[3:0], LD[3:0], XSCL, LP, YD and WF signals are driven into a low state (or
optionally, a high impedance state) and the LCDPWR# signal is driven high.
A low level on this pin puts the chip into Doze mode. The function of the Doze mode
is determined by the Doze Mode Select bits in AUX[03]. This pin is ignored if the
SUSPEND# input pin is asserted.
MD Line Status
MD[6] = 1
MD[6] = 0
MD[6] = 1
MD[6] = 0
MD[6] = 1
MD[6] = 0
Functional Description
DRAM Column Address
Strobe (Low Byte)
DRAM Write Enable Strobe
DRAM Column Address
Strobe (High Byte)
DRAM Column Address Strobe
DRAM Write Strobe
DRAM Write Strobe
(High Byte)
(1/0)
412-1.0
SPC8104