ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 180

• Manufacturer Part Number: ds26524
• Description: Ds26524 Quad T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: BERT Port Channel Select Receive Channels 1 to 32 (CH[1:32]).
0 = Do not enable the receive BERT clock for the associated channel time, or map the selected channel
data out of the receive BERT port.
1 = Enable the receive BERT clock for the associated channel time, and allow mapping of the selected
channel data out of the receive BERT port. Multiple or all channels may be selected simultaneously.
(MSB) 7
CH16
CH24
CH32
CH8
0
CH15
CH23
CH31
CH7
RBPCS1, RBPCS2, RBPCS3, RBPCS4
Receive BERT Port Channel Select Registers 1 to 4
0D4h, 0D5h, 0D6h, 0D7h + (200h x n): where n = 0 to 3, for Ports 1 to 4
6
0
CH14
CH22
CH30
CH6
5
0
CH13
CH21
CH29
CH5
4
0
180 of 273
CH12
CH20
CH28
CH4
3
0
CH11
CH19
CH27
CH3
2
0
CH10
CH18
CH26
CH2
1
0
0 (LSB)
CH17
CH25
CH1
CH9
0
RBPCS1
RBPCS2
RBPCS3
RBPCS4
(E1 Mode
Only)