mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 119

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

9.6 CGM Registers
MC68HC08QA24
Freescale Semiconductor
NOTES:
Addr.
$001C
$001D
$001E
1. When AUTO = 0, PLLIE is forced to logic 0 and is read-only.
2. When AUTO = 0, PLLF and LOCK read as logic 0.
3. When AUTO = 1, ACQ is read-only.
4. When PLLON = 0 or VRS[7:4] = $0, BCS is forced to logic 0 and is read-only.
5. When PLLON = 1, the PLL programming register is read-only.
6. When BCS = 1, PLLON is forced set and is read-only.
PLL Bandwidth Control Register
PLL Programming Register
Register Name
PLL Control Register
(PBWC)
These registers control and monitor operation of the CGM:
Figure 9-4
(PCTL)
(PPG)
•
•
•
Figure 9-4. CGM I/O Register Summary
Reset:
Reset:
Reset:
PLL control register (PCTL) described in
Register
PLL bandwidth control register (PBWC) described in
Bandwidth Control Register
PLL programming register (PPG) described in
Programming Register
Read:
Read:
Read:
Write:
Write:
Write:
Clock Generator Module (CGM)
is a summary of the CGM registers.
PLLIE
AUTO
Bit 7
MUL7
R
0
0
0
= Reserved
LOCK
MUL6
PLLF
6
R
R
0
0
1
PLLON
MUL5
ACQ
5
1
0
1
MUL4
BCS
XLD
4
0
0
0
VRS7
R
R
3
1
1
0
0
0
Clock Generator Module (CGM)
9.6.1 PLL Control
VRS6
R
R
2
1
1
0
0
1
9.6.3 PLL
VRS5
Technical Data
9.6.2 PLL
R
R
1
1
1
0
0
1
Bit 0
VRS4
R
R
1
1
0
0
0
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