mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 279

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

19.4.5 Accuracy and Precision
19.5 Interrupts
19.6 Low-Power Modes
19.6.1 Wait Mode
19.6.2 Stop Mode
MC68HC08QA24
Freescale Semiconductor
the ADCO bit is cleared. The COCO bit (ADC status control register,
$0038) is set after each conversion and can be cleared by writing the
ADC status and control register or reading of the ADC data register.
The conversion process is monotonic and has no missing codes. See
23.7 ADC Characteristics
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
This section describes the low-power modes.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting the ADCH[4:0] bits in the ADC status
and control register to logic 1s before executing the WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode. Allow one conversion cycle to stabilize the analog
circuitry before attempting a new ADC conversion after exiting stop
mode.
Analog-to-Digital Converter (ADC)
for accuracy information.
Analog-to-Digital Converter (ADC)
Technical Data
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