mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 353

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

22.8 Protocol Violation Protection
22.9 Low-Power Modes
22.9.1 MSCAN08 Internal Sleep Mode
MC68HC08QA24
Freescale Semiconductor
The MSCAN08 will protect the user from accidentally violating the CAN
protocol through programming errors. The protection logic implements
these features:
The WAIT and STOP instructions put the MCU in low power-
consumption stand-by mode.
The CPU can request the MSCAN08 to enter the low-power mode by
asserting the SLPRQ bit in the module configuration register
(see
stop unless the module is active (such as receiving a message). The
SLPAK bit indicates whether the MSCAN08 successfully went into sleep
mode. The application software should use this flag as a handshake
indication for the request to go into sleep mode. If not set after the
request, the MSCAN08 is active and has not yet entered sleep mode. No
wakeup interrupt will occur in that case.
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Figure
The receive and transmit error counters cannot be written or
otherwise manipulated.
All registers which control the configuration of the MSCAN08 can
not be modified while the MSCAN08 is on-line. The SFTRES bit in
the MSCAN08 module control register (see
Module Control
registers:
– MSCAN08 module control register 1 (CMCR1)
– MSCAN08 bus timing register 0 and 1 (CBTR0 and CBTR1)
– MSCAN08 identifier acceptance control register (CIDAC)
– MSCAN08 identifier acceptance registers (CIDAR0–CIDAR3)
– MSCAN08 identifier mask registers (CIDMR0–CIDMR3)
The CANTx pin is forced to recessive if the CPU goes into stop
mode.
22-6). This causes the MSCAN08 module internal clock to
CAN Controller
Register) serves as a lock to protect these
22.14.1 MSCAN08
CAN Controller
Technical Data
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