mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 373

no-image

mc68hc08qa24

Manufacturer Part Number
mc68hc08qa24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
22.14.5 MSCAN08 Receiver Flag Register
MC68HC08QA24
Freescale Semiconductor
Address:
All bits of this register are read and clear only. A flag can be cleared by
writing a 1 to the corresponding bit position. A flag can be cleared only
when the condition which caused the setting is valid no more. Writing a
0 has no effect on the flag setting. Every flag has an associated interrupt
enable flag in the CRIER register. A hard or soft reset will clear the
register.
WUPIF — Wakeup Interrupt Flag
RWRNIF — Receiver Warning Interrupt Flag
TWRNIF — Transmitter Warning Interrupt Flag
Reset:
Read:
Write:
If the MSCAN08 detects bus activity while it is asleep, it clears the
SLPAKSLPAK bit in the CMCR0 register; the WUPIF bit will then be
set. If not masked, a wakeup interrupt is pending while this flag is set.
This bit will be set when the MSCAN08 went into warning status
because the receive error counter was in the range of 96 to 127. If not
masked, an error interrupt is pending while this flag is set.
This bit will be set when the MSCAN08 went into warning status
because the transmit error counter was in the range of 96 to 127. If
not masked, an error interrupt is pending while this flag is set.
1 = MSCAN08 has detected activity on the bus and requested
0 = No wake up interrupt has occurred.
1 = MSCAN08 went into warning status.
0 = No warning interrupt has occurred.
1 = MSCAN08 went into warning status.
0 = No warning interrupt has occurred.
Figure 22-18. CAN Receiver Flag Register (CRFLG)
WUPIF
$0504
Bit 7
wake up.
0
RWRNIF
CAN Controller
6
0
TWRNIF
5
0
RERRIF
4
0
TERRIF
3
0
BOFFIF
2
0
OVRIF
CAN Controller
1
0
Technical Data
Bit 0
RXF
0
371

Related parts for mc68hc08qa24