mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 265

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

18.13.1 MISO (Master In/Slave Out)
18.13.2 MOSI (Master Out/Slave In)
MC68HC08QA24
Freescale Semiconductor
The SPI has limited inter-integrated circuit (I
software support) as a master in a single-master environment. To
communicate with I
when the SPWOM bit in the SPI control register is set. In I
communication, the MOSI and MISO pins are connected to a
bidirectional pin from the I
to V
MISO is one of the two SPI module pins that transmit serial data. In full
duplex operation, the MISO pin of the master SPI module is connected
to the MISO pin of the slave SPI module. The master SPI simultaneously
receives data on its MISO pin and transmits data from its MOSI pin.
Slave output data on the MISO pin is enabled only when the SPI is
configured as a slave. The SPI is configured as a slave when its
SPMSTR bit is logic 0 and its SS pin is at logic 0. To support a
multiple-slave system, a logic 1 on the SS pin puts the MISO pin in a
high-impedance state.
When enabled, the SPI controls data direction of the MISO pin
regardless of the state of the data direction register of the shared I/O
port.
MOSI is one of the two SPI module pins that transmit serial data. In full
duplex operation, the MOSI pin of the master SPI module is connected
to the MOSI pin of the slave SPI module. The master SPI simultaneously
transmits data from its MOSI pin and receives data on its MISO pin.
When enabled, the SPI controls data direction of the MOSI pin
regardless of the state of the data direction register of the shared I/O
port.
DD
.
Serial Peripheral Interface (SPI)
2
C peripherals, MOSI becomes an open-drain output
2
C peripheral and through a pullup resistor
2
Serial Peripheral Interface (SPI)
C) capability (requiring
2
Technical Data
C
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