mc68hc08qa24 Freescale Semiconductor, Inc, mc68hc08qa24 Datasheet - Page 293

• Manufacturer Part Number: mc68hc08qa24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

20.4.3 Output Compare
20.4.3.1 Unbuffered Output Compare
MC68HC08QA24
Freescale Semiconductor
With the output compare function, the TIMA can generate a periodic
pulse with a programmable polarity, duration, and frequency. When the
counter reaches the value in the registers of an output compare channel,
the TIMA can set, clear, or toggle the channel pin. Output compares can
generate TIMA CPU interrupt requests.
Any output compare channel can generate unbuffered output compare
pulses as described in
unbuffered because changing the output compare value requires writing
the new value over the old value currently in the TIMA channel registers.
An unsynchronized write to the TIMA channel registers to change an
output compare value could cause incorrect operation for up to two
counter overflow periods. For example, writing a new value before the
counter reaches the old value but after the counter reaches the new
value prevents any compare during that counter overflow period. Also,
using a TIMA overflow interrupt routine to write a new, smaller output
compare value may cause the compare to be missed. The TIMA may
pass the new value before it is written.
Use these methods to synchronize unbuffered changes in the output
compare value on channel x:
•
•
When changing to a smaller value, enable channel x output
compare interrupts and write the new value in the output compare
interrupt routine. The output compare interrupt occurs at the end
of the current output compare pulse. The interrupt routine has until
the end of the counter overflow period to write the new value.
When changing to a larger output compare value, enable channel
x TIMA overflow interrupts and write the new value in the TIMA
overflow interrupt routine. The TIMA overflow interrupt occurs at
the end of the current counter overflow period. Writing a larger
value in an output compare interrupt routine (at the end of the
current pulse) could cause two output compares to occur in the
same counter overflow period.
Timer Interface A (TIMA)
20.4.3 Output
Compare. The pulses are
Timer Interface A (TIMA)
Technical Data
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