at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 208

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

21.8.4
21.8.4.1
Figure 21-14. WRITE_MODE = 1. The write operation is controlled by NWE
21.8.4.2
208
AT91SAM9263 Preliminary
Write Mode
Write is Controlled by NWE (WRITE_MODE = 1):
Write is Controlled by NCS (WRITE_MODE = 0)
NWR0, NWR1,
NWR2, NWR3
NBS0, NBS1,
NBS2, NBS3,
A0, A1
A
D[31:0]
NWE,
[25:2]
MCK
NCS
The WRITE_MODE parameter in the SMC_MODE register of the corresponding chip select indi-
cates which signal controls the write operation.
Figure 21-14
put on the bus during the pulse and hold steps of the NWE signal. The internal data buffers are
turned out after the NWE_SETUP time, and until the end of the write cycle, regardless of the
programmed waveform on NCS.
Figure 21-15
put on the bus during the pulse and hold steps of the NCS signal. The internal data buffers are
turned out after the NCS_WR_SETUP time, and until the end of the write cycle, regardless of
the programmed waveform on NWE.
shows the waveforms of a write operation with WRITE_MODE set to 1. The data is
shows the waveforms of a write operation with WRITE_MODE set to 0. The data is
6249D–ATARM–20-Dec-07