at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 490

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

32.5.6
Figure 32-13. TWI Write Operation with Single Data Byte without Internal Address
490
AT91SAM9263 Preliminary
Read/Write Flowcharts
The following flowcharts shown in
page
give examples for read and write operations. A polling or interrupt method can be used to check
the status bits. The interrupt method requires that the interrupt enable register (TWI_IER) be
configured first.
492,
Figure 32-16 on page
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Device slave address (DADR)
Set the Master Mode register:
Write ==> bit MREAD = 0
TWI_THR = Data to send
Set the Control register:
Load Transmit register
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
TWI_CR = MSEN
Transfer finished
- Master enable
TXCOMP = 1?
Set TWI clock
TXRDY = 1?
Yes
Yes
BEGIN
493,
Figure
Figure 32-17 on page 494
32-13,
No
No
Figure 32-14 on page
and
Figure 32-18 on page 495
491,
6249D–ATARM–20-Dec-07
Figure 32-15 on