at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 296

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 24-14. DMA Transfer for Source Address Auto-reloaded and Contiguous Destination Address
24.3.5.7
6249D–ATARM–20-Dec-07
Multi-block DMA Transfer with Linked List for Source and Contiguous Destination Address (Row 8)
DMAC Transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose a free (disabled) channel.
2. Set up the linked list in memory. Write the control information in the LLI. DMAC_CTLx
register location of the block descriptor for each LLI in memory for channel x. For exam-
ple, in the register, you can program the following:
a. Set up the transfer type (memory or non-memory peripheral for source and desti-
b. Set up the transfer characteristics, such as:
– i. Transfer width for the source in the SRC_TR_WIDTH field.
– ii. Transfer width for the destination in the DST_TR_WIDTH field.
– iii. Source master layer in the SMS field where source resides.
– iv. Destination master layer in the DMS field where destination resides.
Channel Disabled by
nation) and flow control device by programming the TT_FC of the DMAC_CTLx
register.
Block Complete interrupt
hardware
generated here
yes
interrupt cleared by software
DMAC State Machine Table?
Stall until Block Complete
MASKBLOCK[x]=1?
Channel Enabled by
Reload SARx, CTLx
Is DMAC in Row1 of
AT91SAM9263 Preliminary
CTLx.INT_EN=1
Block Transfer
software
&&
no
yes
no
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