at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 617

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

35.7.12
Register Name:
Access Type:
• CEM: Channel x Endian Mode
0: Transferring data through Channel x is straightforward (Little-endian).
1: Transferring data through Channel x from/to a memory is performed with from/to Big-endian format translation.
• SIZE: Channel x Data Size
SIZE Encoding
Note:
• CEN: Channel x Enable
0: Data transfer is disabled on Channel x.
1: Data transfer is enabled on Channel x.
• PDCCEN: Peripheral Data Controller Channel Enable
0: Channel x is not transferred through a Peripheral Data Controller Channel. Related PDC flags are ignored or not
generated.
1: Channel x is transferred through a Peripheral Data Controller Channel. Related PDC flags are taken into account or
generated.
6249D–ATARM–20-Dec-07
31
23
15
–
–
–
7
–
Each time slot in the data phase is 20 bits long. For example, if a 16-bit sample stream is being played to an AC97 DAC, the first
16 bit positions are presented to the DAC MSB-justified. They are followed by the next four bit positions that the AC’97 Controller
fills with zeroes. This process ensures that the least significant bits do not introduce any DC biasing, regardless of the imple-
mented DAC’s resolution (16-, 18-, or 20-bit).
SIZE
AC’97 Controller Channel B Mode Register
0x0
0x1
0x2
0x3
30
22
14
AC97C_CBMR
Read/Write
–
–
–
6
–
Selected Channel
20 bits
18bits
16 bits
10 bits
OVRUN
CEN
29
21
13
–
–
5
RXRDY
28
20
12
–
–
–
4
27
19
11
–
–
–
3
–
AT91SAM9263 Preliminary
UNRUN
CEM
26
18
10
–
–
2
TXEMPTY
25
17
–
9
–
1
SIZE
TXRDY
24
16
–
8
–
0
617