at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 289

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 24-10. DMA Transfer Flow for Source and Destination Address Auto-reloaded
24.3.5.5
6249D–ATARM–20-Dec-07
Multi-block Transfer with Source Address Auto-reloaded and Linked List Destination Address (Row7)
DMAC transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose a free (disabled) channel.
2. Set up the chain of linked list items (otherwise known as block descriptors) in memory.
Write the control information in the LLI.DMAC_CTLx register location of the block
descriptor for each LLI in memory for channel x. For example, in the register you can
program the following:
a. Set up the transfer type (memory or non-memory peripheral for source and desti-
b. Set up the transfer characteristics, such as:
– i. Transfer width for the source in the SRC_TR_WIDTH field.
– ii. Transfer width for the destination in the DST_TR_WIDTH field.
– iii. Source master layer in the SMS field where source resides.
– iv. Destination master layer in the DMS field where destination resides.
– v. Incrementing/decrementing or fixed address for source in SINC field.
nation) and flow control peripheral by programming the TT_FC of the DMAC_CTLx
register.
Channel Disabled by
hardware
Block Complete interrupt
generated here
yes
interrupt cleared by software
Reload SARx, DARx, CTLx
DMAC State Machine Table?
Stall until block complete
Channel Enabled by
MASKBLOCK[x]=1?
Is DMAC in Row1 of
CTLx.INT_EN=1
Block Transfer
AT91SAM9263 Preliminary
software
&&
yes
no
no
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