at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 500
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
at91sam9263
Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9263.pdf
(1065 pages)
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32.6.4
Register Name:
Access Type:
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
500
T
T
low
high
=
=
31
23
15
–
–
7
(
(
(
CLDIV
(
CHDIV
AT91SAM9263 Preliminary
TWI Clock Waveform Generator Register
×
×
2
CKDIV
2
CKDIV
30
22
14
TWI_CWGR
–
–
6
)
Read/Write
+
)
+
3 )
3 )
×
×
T
MCK
T
MCK
29
21
13
–
–
5
28
20
12
–
–
4
CHDIV
CLDIV
27
19
11
–
–
3
26
18
10
–
2
CKDIV
25
17
–
9
1
6249D–ATARM–20-Dec-07
24
16
–
8
0
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