at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 350

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 26-4. Divider and PLL Block Diagram
26.4.1
Figure 26-5. PLL Capacitors and Resistors
26.4.2
350
AT91SAM9263 Preliminary
PLL Filter
Divider and Phase Lock Loop Programming
MAINCK
The PLL requires connection to an external second-order filter through the PLLRCA and/or PLL-
RCB pin.
Values of R, C1 and C2 to be connected to the PLLRC pin must be calculated as a function of
the PLL input frequency, the PLL output frequency and the phase margin. A trade-off has to be
found between output signal overshoot and startup time.
The divider can be set between 1 and 255 in steps of 1. When a divider field (DIV) is set to 0, the
output of the corresponding divider and the PLL output is a continuous signal at level 0. On
reset, each DIV field is set to 0, thus the corresponding PLL input clock is set to 0.
SLCK
Figure 26-5
C2
shows a schematic of these filters.
C1
R
Divider B
Divider A
DIVB
DIVA
PLLRC
GND
PLLRCB
PLLRCA
MULB
MULA
PLLBCOUNT
PLLACOUNT
PLL
Counter
Counter
PLL B
PLL A
PLL B
PLL A
OUTB
OUTA
LOCKB
LOCKA
PLLBCK
PLLACK
6249D–ATARM–20-Dec-07