at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 668

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

37.6.4.2
Figure 37-7. Line Error Mode
668
Fault Confinement
AT91SAM9263 Preliminary
Error Detection
REC > 127
TEC > 127
There are five different error types that are not mutually exclusive. Each error concerns only spe-
cific fields of the CAN data frame (refer to the Bosch CAN specification for their
correspondence):
To distinguish between temporary and permanent failures, every CAN controller has two error
counters: REC (Receive Error Counter) and TEC (Transmit Error Counter). The counters are
incremented upon detected errors and respectively are decremented upon correct transmissions
or receptions. Depending on the counter values, the state of the node changes: the initial state
of the CAN controller is Error Active, meaning that the controller can send Error Active flags. The
controller changes to the Error Passive state if there is an accumulation of errors. If the CAN
controller fails or if there is an extreme accumulation of errors, there is a state transition to Bus
Off.
• CRC error (CERR bit in the CAN_SR register): With the CRC, the transmitter calculates a
• Bit-stuffing error (SERR bit in the CAN_SR register): If a node detects a sixth consecutive
• Bit error (BERR bit in CAN_SR register): A bit error occurs if a transmitter sends a dominant
• Form Error (FERR bit in the CAN_SR register): If a transmitter detects a dominant bit in one
• Acknowledgment error (AERR bit in the CAN_SR register): The transmitter checks the
checksum for the CRC bit sequence from the Start of Frame bit until the end of the Data
Field. This CRC sequence is transmitted in the CRC field of the Data or Remote Frame.
equal bit level during the bit-stuffing area of a frame, it generates an Error Frame starting with
the next bit-time.
bit but detects a recessive bit on the bus line, or if it sends a recessive bit but detects a
dominant bit on the bus line. An error frame is generated and starts with the next bit time.
of the fix-formatted segments CRC Delimiter, ACK Delimiter or End of Frame, a form error
has occurred and an error frame is generated.
Acknowledge Slot, which is transmitted by the transmitting node as a recessive bit, contains a
dominant bit. If this is the case, at least one other node has received the frame correctly. If
not, an Acknowledge Error has occurred and the transmitter will start in the next bit-time an
Error Frame transmission.
or
PASSIVE
ERROR
ERROR
ACTIVE
TEC > 255
Init
REC < 127
TEC < 127
and
128 occurences of 11 consecutive recessive bits
BUS OFF
CAN controller reset
or
6249D–ATARM–20-Dec-07