at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 127

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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18.6.2
Register Name:
Access Type:
• WKMODE0: Wake-up Mode 0
• CPTWK0: Counter on Wake-up 0
Defines the number of 16 Slow Clock cycles, the level detection on the corresponding input pin shall last before the wake-
up event occurs. Because of the internal synchronization of WKUP0, the
(CPTWK x 16 + 1) Slow Clock cycles after the event on WKUP.
• RTTWKEN: Real-time Timer Wake-up Enable
0 = The RTT Alarm signal has no effect on the Shutdown Controller.
1 = The RTT Alarm signal forces the de-assertion of the
6221G–ATARM–31-Jan-08
31
23
15
7
0
0
1
1
WKMODE[1:0]
Shutdown Mode Register
30
22
14
6
SHDW_MR
Read/Write
0
1
0
1
CPTWK1
CPTWK0
Wake-up Input Transition Selection
None. No detection is performed on the wake-up input
Low to high level
High to low level
Both levels change
29
21
13
5
28
20
12
4
SHDN
pin.
27
19
11
3
SHDN
pin is released
26
18
10
2
AT91SAM9260
25
17
9
1
WKMODE0
RTTWKEN
24
16
8
0
127

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