at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 560

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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35.7.4
6221G–ATARM–31-Jan-08
Write Operation
In write operation, the MCI Mode Register (MCI_MR) is used to define the padding value when
writing non-multiple block size. If the bit PDCPADV is 0, then 0x00 value is used when padding
data, otherwise 0xFF is used.
If set, the bit PDCMODE enables PDC transfer.
The following flowchart shows how to write a single block with or without use of PDC facilities
(see
to the contents of the Interrupt Mask Register (MCI_IMR).
Figure
35-11). Polling or interrupt method can be used to wait for the end of write according
AT91SAM9260
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